# Chiplab — full site content for LLMs

> Chiplab is an MCP platform by Veecle that lets AI coding agents compile, simulate, and validate firmware on virtual instances of real microcontrollers — no physical hardware. This file is the full text corpus of https://veecle.ai for one-fetch ingestion. Curated index: https://veecle.ai/llms.txt

# Home / Product (https://veecle.ai/ and https://veecle.ai/chiplab)

Chiplab is the API between AI agents and silicon. Agents call Chiplab over MCP to run firmware on a virtual instance of the real target chip — same binary, same peripherals, same interrupt timing as the physical board. Not a generic CPU emulation. Cross-compilation, peripheral simulation, sensor IO, and chip-by-chip plumbing are exposed through one endpoint: https://chiplab.veecle.ai/mcp

Every run deposits what happened into a shared corpus. The next agent that calls inherits it.

How it works:
1. The agent calls — Cursor, Claude Code, Codex, Windsurf, opencode, any MCP host. One endpoint.
2. Chiplab routes — corpus lookup, build, simulate, test, bench, composed behind a single verb.
3. Firmware proves out — verdict, trace, fix, back to the agent in seconds. The corpus learns.

The MCP verbs:

- chiplab.ask (shipped): Semantic + structural search across every firmware test, validated fix, architecture decision, and chip-specific gotcha indexed in the corpus. Returns ranked matches with confidence and provenance.
- chiplab.run (shipped): Execute firmware on a virtual chip via Renode or QEMU. The agent submits an ELF + target board; Chiplab boots the virtual chip and returns stdout/UART capture, telemetry, GPIO/register state, and any panic or fault trace. No local toolchain, no hardware.
- chiplab.build (in progress): Compile remotely against production toolchains — GCC, LLVM, IAR EWARM, Keil ARMCC, HighTec ASIL-D, Renesas CC-RX — without installing or licensing them.
- chiplab.test (in progress): Unit and integration tests on virtual hardware every commit. Coverage, regression tracking, root-cause matching against the corpus.
- chiplab.bench (planned): Profile code and recommend the optimal board — timing, memory, power, and cost side by side across chip families.
- chiplab.simulate (planned): Full-system simulation against partner environment models — Renode for the chip; BeamNG, dSPACE, NVIDIA Isaac for the world it lives in. Inject synthetic sensor data (camera frames, CAN bus, IMU) into running firmware.
- chiplab.generate (planned): AI-driven inputs — fuzz cases, synthetic sensor frames, edge-case stimuli.
- chiplab.automate (planned): The orchestrator. Chain build → run → test → bench → simulate → ask autonomously.

# Supported boards (today)

Chiplab currently supports STM32 and Nordic nRF boards. Each has ready-to-run examples in https://github.com/veecle/chiplab under examples/<framework>/<board>/:

| Board | Chip | Board key | Frameworks with examples |
|---|---|---|---|
| STM32F4 Discovery | STM32F407 | stm32f4_discovery | bare-metal, embassy-rust, freertos |
| STM32F7 Discovery | STM32F746 | stm32f7_discovery | bare-metal, embassy-rust |
| STM32F103 Blue Pill | STM32F103 | stm32f103_blue_pill | bare-metal, embassy-rust |
| STM32WBA52 Nucleo | STM32WBA52 | stm32wba52_nucleo | embassy-rust |
| STM32L073 Nucleo | STM32L073 | stm32l073_nucleo | bare-metal, embassy-rust |
| STM32H745 Nucleo | STM32H745 | stm32h745_nucleo | bare-metal |
| nRF52840 DK | nRF52840 | nrf52840_dk | bare-metal, embassy-rust, zephyr-os |

Simulation covers CPU execution of the ELF, UART/USART/LPUART peripherals (output captured and returned), and peripheral registers and interrupt timing matching the physical chip. Runs are bounded to a fixed amount of virtual CPU time. The discovery/help tool (call it with no arguments) is the authoritative, up-to-date source for boards and tools.

# Connect your agent

Chiplab is an HTTP MCP server at https://chiplab.veecle.ai/mcp. Standard mcpServers config:

{
  "mcpServers": {
    "chiplab": {
      "type": "http",
      "url": "https://chiplab.veecle.ai/mcp"
    }
  }
}

Claude Code: claude mcp add --transport http chiplab https://chiplab.veecle.ai/mcp
Codex (~/.codex/config.toml): [mcp_servers.chiplab] url = "https://chiplab.veecle.ai/mcp", then codex mcp login chiplab
VS Code: same JSON block in .vscode/mcp.json under a "servers" key.

On first use the client opens a browser to sign in. Accounts are self-serve and free at https://chiplab.veecle.ai — no credit card.

# Pricing (https://veecle.ai/pricing)

Credits, not seats. Every MCP verb invocation consumes credits priced by the compute it actually triggers.

- Free: €0 forever. 1,000 credits/day, resets every 24h. Access to all verbs and features, any agent.
- Pay-as-you-do (recommended): €10 per 1,000 credits. Top up when you outgrow the daily pool. Coming soon.
- Enterprise: custom. Volume commit, custom chip/tool integrations, on-prem deployment, SLAs.

# Roadmap (https://veecle.ai/roadmap)

Eight verbs, one endpoint. Today: ask + run, on STM32 and Nordic. Q3 2026: build + test, adding Infineon. Q4 2026: bench + simulate, adding Renesas. 2027+: generate + automate, adding NXP. For each supported chipmaker Chiplab starts with one mainstream chip and expands coverage. Missing a chip? Open a request at https://github.com/veecle/chiplab/issues/new/choose or ask via https://veecle.ai/contact

# About (https://veecle.ai/about)

Veecle did not start here. Two products' worth of expertise feed Chiplab: an open-source Rust RTOS shipped on production devices (system internals — real-time constraints, memory budgets, silicon quirks) and a browser-based embedded IDE (developer experience — fast test loops, debugging surfaces, observability). Based in Berlin. Backed by exist, Relay Ventures, IBB Ventures, F-LOG Ventures, Plug and Play, and IT Inkubator. Careers: https://veecle.jobs.personio.com/

# Links

- Product site: https://veecle.ai
- App / sign in: https://chiplab.veecle.ai
- MCP endpoint: https://chiplab.veecle.ai/mcp
- Examples repo: https://github.com/veecle/chiplab
- GitHub org: https://github.com/veecle
- Discord: https://discord.com/invite/F6GwZJ6ktP
- LinkedIn: https://linkedin.com/company/veecle