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Eight verbs. One endpoint.
Today's surface is ask + run. The rest is on the rails.
CAPABILITIES
VERB
STATUS
WHAT THE AGENT GETS
ask
shipped
Semantic + structural search across every firmware test, validated fix, architecture decision and chip-specific gotcha indexed in the corpus. Returns ranked matches with confidence and provenance.
run
shipped
Execute code on a virtual chip via Renode or QEMU. Returns stdout, stderr, telemetry, GPIO/register state, and any panic or fault trace. No local toolchain.
build
wip
Compile remotely against any production toolchain — GCC, LLVM, IAR EWARM, Keil ARMCC, HighTec ASIL-D, Renesas CC-RX. The agent never touches a license.
test
wip
Run unit and integration tests on virtual hardware. Coverage, regression tracking, root-cause matching against the corpus.
bench
wip
Profile code and recommend the optimal board. Timing, memory, power and cost — side by side across chip families.
simulate
wip
Full-system simulation against partner environment models — Renode for the chip, BeamNG / dSPACE / NVIDIA Isaac for the world it lives in.
generate
wip
AI-driven inputs for AI-driven workflows. Fuzz cases, synthetic sensor frames (camera, lidar, IMU), edge-case stimuli.
automate
wip
The orchestrator. Chain build → run → test → bench → simulate → ask autonomously. The agent declares intent; Chiplab drives the loop.
TIMELINE
When the rest lands.
Approximate windows. Verbs roll out together with the chips they cover. For every supported chipmaker, we start with one mainstream chip and expand coverage over time.
TODAY
VERBS
askrun
CHIPS
STM32 · Nordic
Q3 2026
VERBS
buildtest
CHIPS
+ Infineon
Q4 2026
VERBS
benchsimulate
CHIPS
+ Renesas
2027+
VERBS
generateautomate
CHIPS
+ NXP
MISSING YOUR CHIP?
Want a chip on the list? Let's talk.
If your team builds against silicon we don't cover, get in touch. We add chips when demand is real.